FPGA Video card - Version 2.0

While I have already designed a working but minimal FPGA based VGA graphics card based on the Spartan-6 FPGA, I have already designed a follow up design for the board.

While I’ve yet to explore even a fraction of what could be possible with the current FPGA, the main reason for the redesign was to improve the color definition of the card. The original design was using 12-bit colour, 4 bits per channel, for a total of 4096 colors. While this is keeping in line with computers of the 68000 era, such as the Commodore Amiga range, it’s still limited and in 2022 it would be nice to have a full colour display.

The main reason for the limited colour range with the original board was the choice of the FPGA. Part of the reason for choosing the XC6SLX9-2TQG144C for the original board was to keep the FPGA in a QFP format. The QFP footprint was chosen so that if anybody want’s to create their own version it still allows a (relitivly) easy soldering experience and as yet, I’ve never tried designing a board with a BGA package. While 102 IO lines sounds plenty, between the expansion bus interface, the SRAM and the VGA output, the available pins soon disappear.

For this board, I went with an older but largest Xilinx FPGA that I could find without having to resort to using a BGA part. The Spartan-3 XC3S500E-4PQG208I is a 208 pin part with 158 IO pins.

The main changes on this board over the previous version is that SRAM has been doubled to 4MB and is accessed as a 32-bit wide memory. The resistor DAC for the VGA output has been replaced with a ADV7123 Video DAC with full 24-bit colour.

On the previous board, the Video RAM could be directly accessed by the CPU in pages of 128K, this has now been increased to allow the CPU to access the RAM in 4 pages of 1MB.

I have to say a big thank you to PCBWay who very kindly sponsored this project and supplied the PCB. The next step is to build up the PCB and write some code to test it. While I could re-use a lot of the code from the other board, that was very much a learning experience and trying to expand my VHDL knowledge. It resulted in a working board but the code could be improved on greatly. This new board give me a good start fresh and take a more organised approach to the design.